/*
 *  Copyright (c) 2022 ZhuHai Jieli Technology Co.,Ltd.
 *  Licensed under the Apache License, Version 2.0 (the "License");
 *  you may not use this file except in compliance with the License.
 *  You may obtain a copy of the License at
 *
 *      http://www.apache.org/licenses/LICENSE-2.0
 *
 *  Unless required by applicable law or agreed to in writing, software
 *  distributed under the License is distributed on an "AS IS" BASIS,
 *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 *  See the License for the specific language governing permissions and
 *  limitations under the License.
 */

/**@file        power_port.h
* @brief
* @details        电源模块 gpio 相关
* @author
* @date         2021-11-10
* @version        V1.0
* @copyright      Copyright(c)2010-2021  JIELI
 */
#ifndef __POWER_PORT_H__
#define __POWER_PORT_H__

#include "asm/cpu.h"

enum {
    PORTA_GROUP = 0,
    PORTB_GROUP,
    PORTC_GROUP,
    PORTD_GROUP,
};

// flash
#define        SPI0_PWR_A        IO_PORTD_04
#define        SPI0_CS_A        IO_PORTD_03
#define     SPI0_CLK_A        IO_PORTD_00
#define     SPI0_DO_D0_A    IO_PORTD_01
#define     SPI0_DI_D1_A    IO_PORTD_02
#define     SPI0_WP_D2_A    IO_PORTB_07
#define     SPI0_HOLD_D3_A    IO_PORTD_05

#define        SPI0_PWR_B        IO_PORTD_04
#define        SPI0_CS_B        IO_PORTA_13
#define     SPI0_CLK_B        IO_PORTD_00
#define     SPI0_DO_D0_B    IO_PORTD_01
#define     SPI0_DI_D1_B    IO_PORTA_14
#define     SPI0_WP_D2_B    IO_PORTA_15
#define     SPI0_HOLD_D3_B    IO_PORTD_05

// ps_ram
#define        PSRAM_D0A        IO_PORTA_08
#define        PSRAM_D1A        IO_PORTA_06
#define        PSRAM_D2A        IO_PORTA_07
#define        PSRAM_D3A        IO_PORTA_02

void port_protect(u16 *port_group, u32 port_num);
u32 spi_get_port(void);
void port_init(void);

#endif
